Intel PXA255 - Manual (Page 249)

Intel® PXA255 Processor Developer’s Manual 6-67
Memory Controller
6.8.5 Expansion Card Interface Timing Diagrams and Parameters
Figure 6-29 shows a 16-bit access to a 16-bit memory or I/O device. When common memory is
accessed, the MCMEM0 and MCMEM1 registers are used, depending on whether card socket 0 or
1 is addressed. MCIO0 and MCIO1 are used for I/O accesses and MCATT0 and MCATT1 are used
for access to attribute memory.
Figure 6-29. 16-Bit PC Card Memory or I/O 16-Bit (Half-word) Access
x_ASST_HOLD
x_ASST_WAIT + wait states
x_HOLD x_SET
0ns 50ns 100ns 150ns
MEMCLK
MA,nPREG,PSKTSEL
nPCE2,nPCE1
nPWE,nPOE,nPIOW,nPIOR
RDnWR
nIOIS16
nPWAIT
read_data
write_data