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11 scratchpad register (spr), 3 fifo interrupt mode operation, 1 receive interrupt – Intel PXA255 User Manual
Page 377: 2 character timeout indication interrupt, 3 fifo interrupt mode operation -21, Spr bit definitions -21
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11 scratchpad register (spr), 3 fifo interrupt mode operation, 1 receive interrupt | 2 character timeout indication interrupt, 3 fifo interrupt mode operation -21, Spr bit definitions -21 | Intel PXA255 User Manual | Page 377 / 598
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PXA255
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Fireface 800
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