4 interrupt enable register (ier), Dll bit definitions -8, Dlh bit definitions -8 – Intel PXA255 User Manual

Page 364: Table 10-5, Table 10-6

Text mode
Original mode

4 interrupt enable register (ier), Dll bit definitions -8, Dlh bit definitions -8 | Table 10-5, Table 10-6 | Intel PXA255 User Manual | Page 364 / 598