Artesyn ATCA-9405 Installation and Use (May 2014) - Manual (Page 82)

Service Processor
ATCA-9405 Installation and Use (6806800M71G) 82
4.9 Ethernet Interface
The P2020 has three on-chip enhanced three-speed Ethernet controllers (eTSECs). The eTSECs
incorporate a media access control (MAC) sub layer that supports 10/100/1000 Mbps
Ethernet/802.3 networks with SGMII, GMII, RGMII, MII, RMII, TBI, and RTBI physical interfaces,
as well as 8-bit or 16-bit FIFO interfaces that bypass the Ethernet MAC.
The eTSECs include 2 KB receive and 10 KB transmit FIFOs and DMA functions, support for
programmable CRC generation and checking, RMON statistics, jumbo frames, TCP/IP
acceleration and QoS features, VLAN insertion and deletion and MAC address recognition.
On ATCA-9405, eTSEC1 is configured to RGMII mode while eTSEC2 and eTSEC3 are configured
to SGMII mode. The corresponding strapping is listed in the table below.
4.9.1 Front Panel Interface
P2020 eTSEC1 interface is connected to a 10/100/1000Base-T port at the front panel. The
physical interface is implemented using Marvell
88E1512 Single Port Gigabit Ethernet
Transceiver (connected to the P2020 in RGMII mode) and an RJ45 connector with integrated
magnetics.
4.9.2 Base and Fabric Interface
The eTSEC2 and TSEC3 interfaces are connected to the Ethernet Switch and provide a Gigabit
Ethernet interface to both the control plane (base interface) and the data plane (fabric
interface). The two eTSECs are configured for SGMII mode and are directly connected to the
Ethernet Switch.
Table 4-8 P2020 eTSEC Configuration
Reset Configuration Value eTSEC Configuration
cfg_tsec_reduce
cfg_tsec1_prtcl[0:1] 0
10 eTSEC1 operates in RGMII mode
cfg_sgmii2 0 eTSEC2 operates in SGMII mode
cfg_sgmii3 0 eTSEC3 operates in SGMII mode