Artesyn ATCA-9405 Installation and Use (May 2014) - Manual (Page 134)

Intelligent Peripheral Management Controller
ATCA-9405 Installation and Use (6806800M71G) 134
3 1 Record Checksum (zero checksum)
4 1 Header Checksum (zero checksum)
5 1 LSB of Manufacturer ID. Write as CDh.
6 1 Second Byte of Manufacturer ID. Write as 65h.
7 1 MSB of Manufacturer ID. Write as 00h.
8 1 Motorola Record ID. 01h for Artesyn ECC MAC Address Record.
9 1 Record Format Version. 01h for this specification.
10 1 Number of MAC Address Descriptors (N).
11 N*9 Artesyn ECC MAC Address Descriptors. See Table 8-7 on page 134 , Artesyn
ECC MAC Address Descriptor.
Table 8-7 Artesyn ECC MAC Address Descriptor
Offset Length Description
0 1 Interface Type. See Table 8-8 on
page 135 .
1 1 Length Identifier (for example: 6 =
48 bit MAC, 8 = WWPN)
2 1 MAC Address Count (M) (specifying
a continuous pool of MAC
addresses starting with the MAC
address specified in this descriptor)
M = 1: this descriptor specifies one
MAC address
M > 1: this descriptor specifies a
pool of MAC addresses with M
count
3 6 MAC Address. (Canonical form, the
LSB (least significant bit) first.
Table 8-6 Artesyn ECC MAC Address Record (continued)
Offset Length Description