Maps and registers, 1 interrupt structure, Chapter 6 – Artesyn ATCA-7365-CE Installation and Use (May 2014) User Manual
Page 155
Chapter 6
ATCA-7365-CE Installation and Use (6806800L73J)
155
Maps and Registers
6.1
Interrupt Structure
The ATCA-7365 supports NON-APIC (legacy PIC Mode) and APIC mode of Interrupt delivery to
the CPUs. The 8259 PIC Mode Interrupt Concentrator inside the ICH10R supports 16 interrupts
(eight external signal inputs). The IO-APIC device inside the ICH10R supports 24 interrupt
sources. In APIC mode the ICH10R supports only Front side bus interrupt delivery (not the serial
APIC mode). The following figure and tables summarize the interrupt sources and mappings
for ATCA-7365. APIC mode is configured through BIOS after boot-up phase which is done in