Altera Stratix V Avalon-ST - Manual (Page 32)

Parameter Value Description
Surprise down
reporting
On/Off
When this option is On, a downstream port supports the
optional capability of detecting and reporting the surprise
down error condition. This parameter is only supported for
the Stratix V Hard IP for PCI Express in Root Port mode.
Slot clock
configuration
On/Off When On, indicates that the Endpoint or Root Port uses the
same physical reference clock that the system provides on the
connector. When Off, the IP core uses an independent clock
regardless of the presence of a reference clock on the
connector.
Slot Capabilities
Table 3-8: Slot Capabilities
Parameter Value Description
Use Slot register On/Off The slot capability is required for Root Ports if a slot is implemented
on the port. Slot status is recorded in the
PCI Express Capabili-
ties
register. This parameter is only supported in Root Port mode.
Defines the characteristics of the slot. You turn on this option by
selecting Enable slot capability. The various bits are defined as
follows:
31 19 18 17 16 15 14 7 6 5
Physical Slot Number
No Command Completed Support
Electromechanical Interlock Present
Slot Power Limit Scale
Slot Power Limit Value
Hot-Plug Capable
Hot-Plug Surprise
Power Indicator Present
Attention Indicator Present
MRL Sensor Present
Power Controller Present
Attention Button Present
0 4 3 2 1
3-12 Slot Capabilities
UG-01097_sriov
2014.12.15
Altera Corporation Parameter Settings
Send Feedback