Altera Stratix V Avalon-ST - Manual (Page 29)

Device Capabilities
Parameter Possible
Values
Default
Value
Description
Maximum
payload size
128 bytes
256 bytes 128 bytes Specifies the maximum payload size supported. This parameter
sets the read-only value of the max payload size supported field
of the Device Capabilities register (0x084[2:0]). Address: 0x084.
Completion
timeout
range
ABCD
BCD
ABC
AB
B
A
None
ABCD Indicates device function support for the optional completion
timeout programmability mechanism. This mechanism allows
system software to modify the completion timeout value. This
field is applicable only to Root Ports and Endpoints that issue
requests on their own behalf. Completion timeouts are
specified and enabled in the Device Control 2 register (0x0A8)
of the PCI Express Capability Structure Version. For all other
functions this field is reserved and must be hardwired to
0x0000b. Four time value ranges are defined:
• Range A: 50 us to 10 ms
• Range B: 10 ms to 250 ms
• Range C: 250 ms to 4 s
• Range D: 4 s to 64 s
Bits are set to show timeout value ranges supported. The
function must implement a timeout value in the range 50 s to
50 ms. The following values are used to specify the range:
• None—Completion timeout programming is not supported
• 0001 Range A
• 0010 Range B
• 0011 Ranges A and B
• 0110 Ranges B and C
• 0111 Ranges A, B, and C
• 1110 Ranges B, C and D
• 1111 Ranges A, B, C, and D
All other values are reserved. Altera recommends that the
completion timeout mechanism expire in no less than 10 ms.
Implement
completion
timeout
disable
On/Off On Disables the completion timeout mechanism. When On, the
core supports the completion timeout disable mechanism via
the PCI Express
Device Control Register 2
. The Applica‐
tion Layer logic must implement the actual completion timeout
mechanism for the required ranges. This option is forced to on
for PCI Express version 2.0 and higher Endpoints.
UG-01097_sriov
2014.12.15
Device Capabilities 3-9
Parameter Settings Altera Corporation
Send Feedback