Dropping a pending msi interrupt – Altera Stratix V Avalon-ST User Manual
Page 116
Setting Up and Verifying MSI Interrupts. Perform them once, during or after enumeration.
1. Disable legacy interrupts by setting
Interrupt Disable
bit of the
Command
register using a Configura‐
tion Write Request. The
Interrupt Disable
bit is bit 10 of the
Command
register.
2. Enable MSI interrupts by setting the
MSI enable
of the
MSI Control
register using a Configuration
Write Request. The
MSI enable
bit is bit 16 of 0x050.
3. Specify the MSI Address and MSI Data using a Configuration Write Request.
4. Specify the number of MSI vectors in the
Multiple Message Enable
field of the
MSI Control
register using a Configuration Write Request.
5. Select a function and interrupt number using a Configuration Write Request.
6. Set the MSI mask bit for the selected function and interrupt number using a Configuration Write
Request.
7. Generate an MSI interrupt request for the selected function and interrupt number using the
app_msi*
interface using a Configuration Write Request. You should receive the MSI Ack. No MSI interrupt
message is sent to the host.
8. Verify that
app_msi_status[1:0]=2'b01
when
app_msi_ack=1
.
9. Read the
Pending Bit
register for the function specified using a Configuration Read Request. Verify
that the pending bit for the interrupt specified is set to 1.
10.Clear the pending bit using the MSI interrupt interface using a Configuration Write Request.
11.Clear the MSI mask bit for the selected function and interrupt number using a Configuration Write
Request..
12.Verify that the SR-IOV Bridge sends the Message TLP to the host.
13.Read the
Pending Bit
register of the function specified using a Configuration Read Request. Verify
that the pending bit for the interrupt specified is now 0.
Dropping a Pending MSI Interrupt
The following procedure shows how to drop a pending MSI interrupt. The first four steps are the same as
for Setting Up and Verifying MSI Interrupts Perform them once, during or after enumeration. .
1. Disable legacy interrupts by setting
Interrupt Disable
bit of the
Command
register using a Configura‐
tion Write Request. The
Interrupt Disable
bit is bit 10 of the
Command
register.
2. Enable MSI interrupts by setting the
MSI enable
of the
MSI Control
register using a Configuration
Write Request. The
MSI enable
bit is bit 16 of 0x050.
3. Set up the MSI Address and MSI Data using a Configuration Write Request.
4. Specify the number of MSI vectors in the
Multiple Message Enable
field of the
MSI Control
register using a Configuration Write Request.
5. Select a function and interrupt number using a Configuration Write Request.
6. Set the
MSI mask
bit for the selected function and interrupt number using a Configuration Write
Request.
7. Use the MSI interrupt interface (
app_msi*
) to generate an MSI interrupt request for the selected
Function and interrupt number. You should receive the MSI Ack. No MSI interrupt message is sent to
the host.
8. Verify that
app_msi_status[1:0]=2'b01
when
app_msi_ack=1
.
9. Read the
Pending Bit
register for the function specified using a Configuration Read Request. Verify
that the pending bit corresponding to the interrupt specified is set to 1.
10.Send a Configuration Write Request to clear the pending bit using the MSI interrupt interface.
7-2
Dropping a Pending MSI Interrupt
UG-01097_sriov
2014.12.15
Altera Corporation
Programming and Testing SR-IOV Bridge MSI Interrupts