Sr-iov system settings – Altera Stratix V Avalon-ST User Manual
Page 24
Parameter
Value
Description
Enable byte
parity ports on
Avalon-ST
interface
On/Off
When on, the RX and TX datapaths are parity protected.
Parity is odd.
This parameter is only available for the Avalon-ST Stratix V
Hard IP for PCI Express.
Enable credit
consumed
selection port tx_
cons_cred_sel
On/Off
When on, the core includes the
tx_cons_cred_sel
port.
Enable Hard IP
reset pulse at
power-up when
using the soft
reset controller
On/Off
When On, the soft reset controller generates a pulse at power
up to reset the Hard IP. This pulse ensures that the Hard IP is
reset after programming the device, regardless of the behavior
of the dedicated PCI Express reset pin,
perstn
. This option is
available for Gen2 and Gen3 designs that use a soft reset
controller.
Related Information
SR-IOV System Settings
Parameter
Value
Description
Total active
Physical
Functions (PFs) :
1-2
This core supports 1 or 2 Physical Functions.
Total Physical
Function0
Virtual
Functions (PF0
VFs):
0
-128
Total number of VFs for PF0. From 0-7 PFs are supported
when ARI is not supported. From 4–128 VFs are supported
when ARI is enabled. If PF1 is enabled, the sum of this field
and PF1 VFs should not exceed 128. When ARI is enabled, the
number of VFs should be a multiple of 4.
Total Physical
Function1
Virtual
Functions (PF1
VFs):
0-128
Total number of VFs for PF1. From 0-7 PFs are supported
when ARI is not supported. From 4–128 VFs are supported
when ARI is enabled. If PF1 is enabled, the sum of this field
and PF1 VFs should not exceed 128. When ARI is enabled, the
number of VFs should be a multiple of 4.
System
Supported Page
Size:
4KB - 4MB
Specifies the pages sizes supported.
3-4
SR-IOV System Settings
UG-01097_sriov
2014.12.15
Altera Corporation
Parameter Settings