Out‑of‑band flow control interface, Management interface, Transceiver control interfaces – Altera 100G Interlaken MegaCore Function User Manual
Page 32: Out-of-band flow control interface -2, Management interface -2, Transceiver control interfaces -2, Out-of-band flow control interface
The 100G Interlaken MegaCore function value for the Interlaken BurstMax parameter is determined by
the value you specify on the
burst_max_in
input signal. The 100G Interlaken MegaCore function
supports three values for BurstMax, 128 bytes, 256, and 512 bytes.
Note: You should only modify the value of the
burst_max_in
signal when no traffic is present.
You can configure your 100G Interlaken MegaCore function to use 1, 2, 4, 8, or 16 pages of 16 calendar
bits. The application determines the use of the in-band flow control bits that the MegaCore function
receives on the incoming Interlaken link, and the application is responsible for specifying the values of the
in-band flow control bits the MegaCore function transmits on the outgoing Interlaken link.
Related Information
•
100G Interlaken IP Core Interlaken Link and Miscellaneous Interface Signals
Information about setting the BurstMax and BurstShort values, including the encoding of your desired
value on the
burst_max_in
or
burst_short_in
input signal.
•
100G Interlaken IP Core User Data Transfer Interface Signals
Information about the in-band flow control signals that you control and view on the application
interface.
•
Available from the Interlaken Alliance web site at www.interlakenalliance.com.
Out‑of‑Band Flow Control Interface
The optional out-of-band flow control interface conforms to the out-of-band requirements in Section
5.3.4.2, Out-of-Band Flow Control, of the Interlaken Protocol Specification, Revision 1.2.
Related Information
•
Out-of-Band Flow Control in the 100G Interlaken MegaCore Function
on page 10-1
•
Available from the Interlaken Alliance web site at www.interlakenalliance.com.
Management Interface
The management interface provides access to the 100G Interlaken IP core internal status and control
registers. This interface does not provide access to the hard PCS registers on the device.
The management interface complies with the Avalon Memory-Mapped (Avalon-MM) specification
defined in the Avalon Interface Specifications.
Related Information
Transceiver Control Interfaces
The 100G Interlaken IP core provides several interfaces to control the transceiver. The transceiver control
interfaces in your 100G Interlaken IP core variation depend on the device family the variation targets.
The 100G Interlaken IP core supports the following transceiver control interfaces:
Transceiver Reconfiguration Controller Interface
Arria 10 External PLL Interface
on page 4-3
4-2
Out‑of‑Band Flow Control Interface
UG-01128
2015.05.04
Altera Corporation
Functional Description