Xcvr – Altera SerialLite II IP Core User Manual
Page 66
4–12
Chapter 4: Functional Description
Clocks and Data Rates
SerialLite II MegaCore Function
January 2014
Altera Corporation
User Guide
Figure 4–11. Streaming No Frequency Offset Clock Structure
Note to
(1) Individual recovered clocks (one per channel).
slite2_top
XCVR
n-bit
n-bit
n-bit
#n SLITE2
High
Speed
Links
#m SLITE2
High
Speed
Links
PComp_FIFO_0
Byte
Serializer
Byte
Serializer
PComp_FIFO_n-1
Byte
Deserializer
Byte
Deserializer
n-bit
rcvd_clk0
rcvd_clkn-1
tx_coreclock
RREFCLK
mreset_n
Reset Sync
tx_coreclock
rcvd_clk_out[n-1:0]
(
1)
Word Aligner (&
Training Pattern
Detection),
[Link State
Machine]
Training
Generator [Link
State Machine]
Atlantic
Regular
(rrefclk
domain)
Atlantic
Regular
(tx_coreclock
domain)
trefclk
TXPLL
rrefclk
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