Cirrus Logic CS42L56 - Manual (Page 6)

6 DS851F2
CS42L56
6.27.1 PGA x Input Select .............................................................................................................. 76
6.27.2 PGAx Volume ...................................................................................................................... 77
6.28 ADCx Attenuator Control: ADCAATT (Address 20h) & ADCBATT (Address 21h) ....................... 77
6.28.1 ADCx Volume ...................................................................................................................... 77
6.29 ALC Enable & Attack Rate (Address 22h) .................................................................................... 78
6.29.1 ALCx .................................................................................................................................... 78
6.29.2 ALC Attack Rate .................................................................................................................. 78
6.30 ALC Release Rate (Address 23h) ................................................................................................ 78
6.30.1 ALC Limit All Channels ........................................................................................................ 78
6.30.2 ALC Release Rate ............................................................................................................... 79
6.31 ALC Threshold (Address 24h) ...................................................................................................... 79
6.31.1 ALC Maximum Threshold .................................................................................................... 79
6.31.2 ALC Minimum Threshold ..................................................................................................... 80
6.32 Noise Gate Control (Address 25h) ............................................................................................... 80
6.32.1 Noise Gate All Channels ..................................................................................................... 80
6.32.2 Noise Gate Enable .............................................................................................................. 80
6.32.3 Noise Gate Threshold and Boost ........................................................................................ 81
6.32.4 Noise Gate Delay Timing .................................................................................................... 81
6.33 ALC and Limiter Soft Ramp, Zero Cross Disables (Address 26h) ................................................ 81
6.33.1 ALCx Soft Ramp Disable ..................................................................................................... 81
6.33.2 ALCx Zero Cross Disable .................................................................................................... 81
6.33.3 Limiter Soft Ramp Disable ................................................................................................... 81
6.34 Automute, Line & HP MUX (Address 27h) ................................................................................... 82
6.34.1 Auto Mute ............................................................................................................................ 82
6.34.2 Line Input Select .................................................................................................................. 82
6.34.3 Headphone Input Select ...................................................................................................... 82
6.35 Headphone Volume Control: HPA (Address 28h) & HPB (Address 29h) ..................................... 82
6.35.1 Headphone Channel x Mute ................................................................................................ 82
6.35.2 Headphone Volume Control ................................................................................................ 83
6.36 Line Volume Control: LINEA (Address 2Ah) & LINEB (Address 2Bh) .......................................... 83
6.36.1 Line Channel x Mute ........................................................................................................... 83
6.36.2 Line Volume Control ............................................................................................................ 83
6.37 Limiter Min/Max Thresholds (Address 2Ch) ................................................................................. 84
6.37.1 Limiter Maximum Threshold ................................................................................................ 84
6.37.2 Limiter Cushion Threshold .................................................................................................. 84
6.38 Limiter Control, Release Rate (Address 2Dh) .............................................................................. 85
6.38.1 Peak Detect and Limiter ...................................................................................................... 85
6.38.2 Peak Signal Limit All Channels ........................................................................................... 85
6.38.3 Limiter Release Rate ........................................................................................................... 85
6.39 Limiter Attack Rate (Address 2Eh) ............................................................................................... 86
6.39.1 Limiter Attack Rate .............................................................................................................. 86
7. PCB LAYOUT CONSIDERATIONS ..................................................................................................... 87
7.1 Power Supply ................................................................................................................................. 87
7.2 Grounding ....................................................................................................................................... 87
7.3 QFN Thermal Pad .......................................................................................................................... 87
8. ANALOG VOLUME NON-LINEARITY (DNL & INL) ............................................................................ 88
9. ADC & DAC DIGITAL FILTERS .......................................................................................................... 89
10. PARAMETER DEFINITIONS .............................................................................................................. 90
11. PACKAGE DIMENSIONS .................................................................................................................. 91
THERMAL CHARACTERISTICS .......................................................................................................... 91
12. ORDERING INFORMATION .............................................................................................................. 92
13. REFERENCES .................................................................................................................................... 92
14. REVISION HISTORY .......................................................................................................................... 92