Cirrus Logic CS42L56 - Manual (Page 10)

10 DS851F2
CS42L56
1.1 I/O Pin Characteristics
Input and output levels and associated power supply voltage are shown in the table below. Logic levels
should not exceed the corresponding power supply voltage.
Power
Supply Pin Name I/O Internal
Connections
Driver Receiver
VL
RESET Input - - 1.8 V - 3.3 V, with Hysteresis
SCL Input - - 1.8 V - 3.3 V, with Hysteresis
SDA Input/Output - CMOS/Open Drain 1.8 V - 3.3 V, with Hysteresis
AD0 Input - - 1.8 V - 3.3 V, with Hysteresis
CCLK Input - - 1.8 V - 3.3 V, with Hysteresis
CDIN Input - - 1.8 V - 3.3 V, with Hysteresis
CS Input - - 1.8 V - 3.3 V, with Hysteresis
MCLK Input - - 1.8 V - 3.3 V
LRCK Input/Output
Weak Pull-up
(~1 M 
1.8 V - 3.3 V, CMOS 1.8 V - 3.3 V
SCLK Input/Output
Weak Pull-up
(~1 M 
1.8 V - 3.3 V, CMOS 1.8 V - 3.3 V
SDOUT Output
Weak Pull-up
(~1 M 
1.8 V - 3.3 V, CMOS -
SDIN Input - - 1.8 V - 3.3 V
VA HPDETECT Input - - 1.8 V - 2.5 V, with Hysteresis