4 analog outputs, Figure 19. dsp engine signal flow, Figure 19.dsp engine signal flow – Cirrus Logic CS42L56 User Manual
Page 37: Cs42l56, Referenced control register location, Fixed function dsp

DS851F2
37
CS42L56
4.4
Analog Outputs
Referenced Control
Register Location
DSP
PDN_DSP
DEEMPH
PMIXxMUTE
PMIXxVOL[6:0]
INV_PCMx
PCMxSWAP[1:0]
AMIXxMUTE
AMIXxVOL[6:0]
ADCxSWAP[1:0]
MSTxVOL[7:0]
MSTxMUTE
DIGSFT
PLYBCKB=A
TC_EN
BASS_CF[1:0]
TREB_CF[1:0]
BASS[3:0]
TREB[3:0]
Limiter
LIMIT
LIMIT_ALL
LIMSRDIS
LMAX[2:0]
CUSH[2:0]
LIMARATE[7:0]
LIMRRATE[7:0]
Beep Generator
“Power Down DSP” on page 66
“HP/Line De-Emphasis” on page 66
“PCM Mixer Channel x Mute” on page 67
“PCM Mixer Channel x Volume” on page 68
“Invert PCM Signal Polarity” on page 66
“PCM Mix Channel Swap” on page 74
“ADC Mixer Channel x Mute” on page 67
“ADC Mixer Channel x Volume” on page 67
“ADC Mix Channel Swap” on page 74
“Master Volume Control” on page 70
“Master Playback Mute” on page 67
“Digital Soft Ramp” on page 64
“Playback Channels B=A” on page 66
“Tone Control Enable” on page 73
“Bass Corner Frequency” on page 73
“Treble Corner Frequency” on page 72
“Bass Gain” on page 73
“Treble Gain” on page 73
“Peak Detect and Limiter” on page 86
“Peak Signal Limit All Channels” on page 86
“Limiter Soft Ramp Disable” on page 82
“Limiter Maximum Threshold” on page 85
“Limiter Cushion Threshold” on page 85
“Limiter Attack Rate” on page 87
“Limiter Release Rate” on page 86
for all referenced controls
Beep
Generator
VOL
Bass/
Treble/
Control
VOL
Peak
Detect
Limiter
Chnl Vol.
Settings
Channel
Swap
Demph
VOL
VOL
MSTAVOL[7:0]
MSTBVOL[7:0]
AMIXAMUTE
AMIXBMUTE
AMIXAVOL[6:0]
AMIXBVOL[6:0]
PMIXAMUTE
PMIXBMUTE
PMIXAVOL[6:0]
PMIXBVOL[6:0]
BPVOL[4:0]
DEEMPH
TC_EN
BASS_CF[1:0]
TREB_CF[1:0]
BASS[3:0]
TREB[3:0]
Fixed Function DSP
MSTAMUTE
MSTBMUTE
DIGSFT
PLYBCKB=A
LIMARATE[7:0]
LIMRRATE[7:0]
LMAX[2:0]
CUSH[2:0]
LIMSRDIS
LIMIT
LIMIT_ALL
PCMASWAP[1:0]
PCMBSWAP[1:0]
PCM Se
rial
In
te
rface
INPUTS FROM ADCA
and ADCB
OFFTIME[2:0]
ONTIME[3:0]
FREQ[3:0]
BEEP[1:0]
Digital Mix to ADC
Serial Interface
Channel
Swap
INV_PCMA
INV_PCMB
ADCASWAP[1:0]
ADCBSWAP[1:0]
PDN_DSP
DAC
to HP and
Line MUX
MSTxVOL[7:0], MSTxMUTE and DIGSFT are always
available regardless of the PDN_DSP setting.
*
*
Figure 19. DSP Engine Signal Flow