KEPCO BOP 1KW-MG Operator Manual, Firmware Ver.2.01 to 2.37 - Manual (Page 167)

BOP-1K 022108
B-21
B.97 STATus:PRESet COMMAND
STAT:PRES
Syntax: Short Form: STAT:PRES Long Form: STATus:PRESet
Description: Disables reporting of all status events. This command sets all bits of the Operation Condition (Table
B-3) and Questionable Condition Registers to 0, preventing all status events from being reported.
(See example, Figure B-4.)
B.98 STATus:QUEStionable[:EVENt]? QUERY
STAT:QUES?
Syntax: Short Form: STAT:QUES[EVEN]? Long Form: STATus:QUEStionable[EVENT]?
Return Value: actual register value
Description: Indicates the latched condition of the Questionable Event register. Returns the value of the
Questionable Event register (see Table B-4). The Questionable Event register is a read-only register
which holds (latches) all events. Only bits 13 and 12 are latched in the Status Questionable Event reg-
ister. Bits 0 and 1 of the Status Questionable Condition Register are not latched in the power supply.
Reading the Questionable Event register clears it. (See example, Figure B-4.)
B.99 STATus:QUEStionable:CONDition? QUERY
STAT:QUES:COND?
Syntax: Short Form: STAT:QUES:COND? Long Form: STATus:QUEStionable:CONDition?
Return Value: actual register value
Description: Returns the value of the Questionable Condition Register (see Table B-4). The Questionable
Condition Register contains unlatched real-time information about questionable conditions of the
power supply. Bit set to 1 = condition (active, true); bit reset to 0 = condition (inactive, false). Bits 1 or
0 may be both be set, indicating the power supply is settling after a voltage change. (See example,
Figure B-4.)
B.100 STATus:QUEStionable:ENABle COMMAND
STAT:QUES:ENAB
Syntax: Short Form: STAT:QUES:ENAB Long Form: STATus:QUESionable:ENABle
Description: Programs Questionable Condition Enable Register (see Table B-4).The Questionable Condition
Enable Register determines which conditions are allowed to set the Questionable Condition Register;
it is a mask for enabling
specific bits in the Questionable Event register that can cause the question-
able summary bit (bit 3) of the Status Byte register to be set. The questionable summary bit is the log-
ical OR of all the enabled bits in the Questionable Event register
. Bit set to 1 = function enabled
(active, true); bit reset to 0 = function disabled (inactive, false) . (See example, Figure B-4.)
B.101 STATus:questionable:ENABle? QUERY
STAT:QUES:ENAB?
Syntax: Short Form: STAT:QUES:ENAB? Long Form: STATus:QUESionable:ENABle?
Return Value: actual register value
Description: Reads Questionable Condition Enable Register (see Table B-4). Power supply returns value of
Questionable Condition Enable Register, indicating which conditions are being monitored. Bit set to 1
= function enabled (active, true); bit reset to 0 = function disabled (inactive, false)
. Related Com-
mands: STAT:QUES?. (See example, Figure B-4.)
B.102 SYSTem:COMMunication:GPIB:ADDRess COMMAND
SYST:COMM:GPIB:ADDR
Syntax: Short Form: SYST:COMM:GPIB:ADDR 0 to 30
Long Form: SYSTem:COMMunication:GPIB:ADDRess 0 to 30
Description:Sets selected power supply GPIB address. NOTE: After executing this command, subse-
quent commands must be directed to the new GPIB address. Requires MEM:UPD (PAR. B.11) to save for
power up. See PAR. 3.5.2.2 and Figure 3-16 for special programming considerations.
TABLE B-4. QUESTIONABLE EVENT REGISTER, QUESTIONABLE CONDITION REGISTER
AND QUESTIONABLE CONDITION ENABLE REGISTER BITS
CONDITION NU CE VE NU TE NU CM VM
BIT 15-14 13 12 11 - 4 3 2 1 0
VALUE 32,768 -16,359 8192 4096 2048 - 16 8 4 2 1
CE CURRENT ERROR
VE VOLTAGE ERROR
CM CURRENT MODE
TE
THERMAL ERROR
VM VOLTAGE MODE
NU
NOT USED