Intel 815 - Manual (Page 16)

Introduction
R
16 Intel
®
815 Chipset Platform Design Guide
1.2 Reference Documents
Document Document Number
/ Location
Intel
®
815 Chipset Family: 82815 Graphics and Memory Controller Hub (GMCH) for
use with the Universal Socket 370 Datasheet
298351
Intel
®
82802AB/82802AC Firmware Hub (FWH) Datasheet 290658
Intel ® 82801AA (ICH) and 82801AB (ICH0) I/O Controller Hub Datasheet 290655
Pentium ® II Processor Developer’s Manual 243341
Pentium ® III Processor Specification Update (latest revision from website) ( http://developer.intel
.com/design/Pentium
III/specupdt/
)
AP 907 Pentium ® III Processor Power Distribution Guidelines 245085
AP-585 Pentium ® II Processor AGTL+ Guidelines 243330
AP-587 Pentium
®
II Processor Power Distribution Guidelines 243332
Accelerated Graphics Port Specification, Revision 2.0 ( ftp://download.intel.c
om/technology/agp/d
ownloads/agp20.pdf
)
PCI Local Bus Specification, Revision 2.2
Universal Serial Bus Specification, Revision 1.0
1.3 System Overview
The Intel 815 chipset for use with the Universal Socket 370 contains a Graphics Memory
Controller Hub (GMCH) component and I/O Controller Hub (ICH) component for desktop
platforms.
The GMCH provides the processor interface (optimized for the Pentium
III processor (CPUID =
068xh) and future 0.13 micron 370 socket processors), DRAM interface, hub interface, and an
accelerated Graphics Port (AGP) interface or internal graphics. This product provides flexibility
and scalability in graphics and memory subsystem performance. Competitive internal graphics
may be scaled via an AGP card interface, and PC100 SDRAM system memory may be scaled to
PC133 system memory.
The Accelerated Hub Architecture interface (i.e., the chipset component interconnect) is designed
into the chipset to provide an efficient, high-bandwidth communication channel between the
GMCH and the I/O controller hub. The chipset architecture also enables a security and
manageability infrastructure through the Firmware Hub component.
An ACPI-compliant Intel 815 chipset platform for use with the universal socket 370 can support
the Full-on (S0), Stop Grant (S1), Suspend to RAM (S3), Suspend to Disk (S4), and Soft-off (S5)
power management states. The chipset also supports Wake-on-LAN
*
for remote administration and
troubleshooting. The chipset architecture removes the requirement of the ISA expansion bus that
was traditionally integrated into the I/O subsystem of PCIsets/AGPsets. This removes many of the
conflicts experienced when installing hardware and drivers into legacy ISA systems. The