Intel 815 User Manual
Page 143
Power Delivery
R
Intel
®
815 Chipset Platform Design Guide
143
5V Dual Switch
This switch will power the 5V Dual plane from the 5V core ATX supply during full-power
operation. During Suspend-to-RAM, the 5V Dual plane will be powered from the 5V Standby
power supply.
Note: The voltage on the 5V Dual plane is not 5V! There is a resistive drop through the 5V Dual Switch
that must be considered. Therefore, NO COMPONENTS should be connected directly to the 5V
Dual plane. On the CRB, the only devices connected to the 5V Dual plane are voltage regulators
(to regulate to lower voltages).
Note: This switch is not required in an Intel 815 chipset platform that does not support Suspend-to-RAM
(STR).
VTT
This power plane is used to power the AGTL/AGTL+ termination resistors. Refer to the latest
revisions of:
•
Pentium III processor (CPUID=068xh) and Celeron processor (CPUID=068xh) Datasheets
Note: This regulator is required in ALL designs.
1.85V
The 1.85V plane powers the GMCH core and the ICH hub interface I/O buffers. This power plane
has a total power requirement of approximately 1.7A. The 1.85V plane should be decoupled with a
0.1
µ
F and a 0.01
µ
F chip capacitor at each corner of the GMCH and with a single 1
µ
F and
0.1
µ
F capacitor at the ICH.
Note: This regulator is required in ALL designs.
VDDQ
The VDDQ plane is used to power the GMCH AGP interface and the graphics component AGP
interface. Refer to the AGP Interface Specification, Revision 2.0 (
h
d
ECR#43 and ECR#44 for specific VDDQ delivery requirements.
For the consideration of component long term reliability, the following power sequence is strongly
recommended while the GMCH’s AGP interface is running at 3.3V. If the AGP interface is
running at 1.5V, the following power sequence recommendation is no longer applicable. The
power sequence recommendations are:
•
During the power-up sequence, the 1.85V must ramp up to 1.0V before 3.3V ramps up to
2.2V.
•
During the power-down sequence, the 1.85V CAN NOT ramp below 1.0V before 3.3V ramps
below 2.2V.
The same power sequence recommendation also applies to the entrance and exit of S3 state, since
the GMCH power is compete off during the S3 state.