Intel 815 - Manual (Page 134)

Clocking
R
134 Intel
®
815 Chipset Platform Design Guide
Figure 69. Universal Platform Clock Architecture (3 DIMMs)
GMCH
APIC
CPU 1
CPU 0
2.5 V
CK 815 3D
3V66 AGP
SDRAM(0)
SDRAM(1)
SDRAM(2)
SDRAM(3)
SDRAM(4)
SDRAM(5)
SDRAM(6)
SDRAM(7)
SDRAM(8)
SDRAM(9)
SDRAM(10)
SDRAM(11)
SDRAM(12)
3V66 0
3V66 1
DOT
USB
REF 0 14.3 MHz
PCI 0 / ICH
PCI 1
1
53
54
12
51
50
47
46
45
42
41
38
29
10
26
4
15
16
Main Mem ory
3 DIMMs
AGP /
local m emory
Host I/F
AGIP /
local
mem ory
GFX
Dot
CLK
Hub I/F
66/266
Processor
I/O Controller Hub
SIO
PCI 1 to
zero delay
System
mem ory
clk_arch_3DIMM
37
36
33
32
11
27
PCI slots
/ down