Maxim Integrated DS21Q55 - Manual (Page 9)

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12. LOOPBACK CONFIGURATION .............................................................................................................68
12.1 P ER -C HANNEL L OOPBACK ...........................................................................................................................70
13. ERROR COUNT REGISTERS .................................................................................................................72
13.1 L INE C ODE V IOLATION C OUNT R EGISTER (LCVCR) ..............................................................................73
13.2 P ATH C ODE V IOLATION C OUNT R EGISTER (PCVCR) .............................................................................75
13.3 F RAMES O UT O F S YNC C OUNT R EGISTER (FOSCR) ...............................................................................76
13.4 E-B IT C OUNTER R EGISTER (EBCR) ...........................................................................................................78
14. DS0 MONITORING FUNCTION ..............................................................................................................79
14.1 T RANSMIT DS0 M ONITOR R EGISTERS ........................................................................................................79
14.2 R ECEIVE DS0 M ONITOR R EGISTERS ...........................................................................................................80
15. SIGNALING OPERATION.........................................................................................................................81
15.1 R ECEIVE S IGNALING ......................................................................................................................................81
15.1.1 Processor-Based Receive Signaling.........................................................................................82
15.1.2 Hardware-Based Receive Signaling..........................................................................................82
15.2 T RANSMIT S IGNALING ...................................................................................................................................87
15.2.1 Processor-Based Transmit Signaling ........................................................................................87
15.2.2 Software Signaling Insertion Enable Registers, E1 CAS Mode .......................................93
15.2.3 Software Signaling Insertion Enable Registers, T1 Mode..................................................95
16. PER-CHANNEL IDLE CODE GENERATION.....................................................................................97
16.1 I DLE C ODE P ROGRAMMING E XAMPLES ......................................................................................................98
17. CHANNEL BLOCKING REGISTERS ..................................................................................................103
18. ELASTIC STORES OPERATION .........................................................................................................106
18.1 R ECEIVE S IDE .............................................................................................................................................. 110
18.1.1 T1 Mode ............................................................................................................................................110
18.1.2 E1 Mode ............................................................................................................................................110
18.2 T RANSMIT S IDE ........................................................................................................................................... 111
18.2.1 T1 Mode ............................................................................................................................................111
18.2.2 E1 Mode ............................................................................................................................................111
18.3 E LASTIC S TORES I NITIALIZATION ............................................................................................................. 111
18.4 M INIMUM -D ELAY M ODE ........................................................................................................................... 111
19. G.706 INTERMEDIATE CRC-4 UPDATING (E1 MODE ONLY)................................................113
20. T1 BIT ORIENTED CODE (BOC) CONTROLLER .........................................................................114
20.1 T RANSMIT BOC .......................................................................................................................................... 114
20.2 R ECEIVE BOC ............................................................................................................................................. 114
21. ADDITIONAL (SA) AND INTERNATIONAL (SI) BIT OPERATION (E1 ONLY) .................118
21.1 H ARDWARE S CHEME (M ETHOD 1)........................................................................................................... 118
21.2 I NTERNAL R EGISTER S CHEME B ASED O N D OUBLE -F RAME (M ETHOD 2).......................................... 118
21.3 I NTERNAL R EGISTER S CHEME B ASED O N CRC4 M ULTIFRAME (M ETHOD 3)................................... 121
22. HDLC CONTROLLERS ............................................................................................................................132
22.1 B ASIC O PERATION D ETAILS ...................................................................................................................... 132
22.2 HDLC C ONFIGURATION ............................................................................................................................ 134
22.2.1 FIFO Control ....................................................................................................................................136
22.3 HDLC M APPING ......................................................................................................................................... 137
22.3.1 Receive ..............................................................................................................................................137
22.3.2 Transmit.............................................................................................................................................139
22.3.3 FIFO Information ............................................................................................................................144