Transmit side d4 timing figure 35-6 – Maxim Integrated DS21Q55 User Manual
Page 213

Product Preview
DS21Q55
213 of 248
012103
Please contact
or search
http://www.maxim-ic.com
for updated
information.
TRANSMIT SIDE D4 TIMING Figure 35-6
NOTES:
1) TSYNC in the frame mode (IOCR1.2 = 0) and double-wide frame sync is not enabled (IOCR1.1 = 0).
2) TSYNC in the frame mode (IOCR1.2 = 0) and double-wide frame sync is enabled (IOCR1.1 = 1).
3) TSYNC in the multiframe mode (IOCR1.2 = 1).
4) TLINK data (Fs-bits) is sampled during the F-bit position of even frames for insertion into the
outgoing T1 stream when enabled via T1TCR1.2.
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
1
2
3
4
TSSYNC
FRAME#
TLCLK
TSYNC
TSYNC
TSYNC
TLINK