Maxim Integrated DS21Q55 User Manual
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DS21Q55
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Register Name:
TCBR3
Register Description:
Transmit Channel Blocking Register 3
Register Address:
8Eh
Bit #
7
6
5
4
3
2
1
0
Name
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Transmit Channels 17 to 24 Channel Blocking Control Bits (CH17 to CH24).
0 = force the TCHBLK pin to remain low during this channel time
1 = force the TCHBLK pin high during this channel time
Register Name:
TCBR4
Register Description:
Transmit Channel Blocking Register 4
Register Address:
8Fh
Bit #
7
6
5
4
3
2
1
0
Name
CH32
CH31
CH30
CH29
CH28
CH27
CH26
CH25
Default
0
0
0
0
0
0
0
0
Bits 0 to 7/Transmit Channels 25 to 32 Channel Blocking Control Bits (CH25 to CH32).
0 = force the TCHBLK pin to remain low during this channel time
1 = force the TCHBLK pin high during this channel time