Maxim Integrated DS21Q55 User Manual
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Register Name:
RFDL
Register Description:
Receive FDL Register
Register Address:
C0h
Bit #
7
6
5
4
3
2
1
0
Name
RFDL7
RFDL6
RFDL5
RFDL4
RFDL3
RFDL2
RFDL1
RFDL0
Default
0
0
0
0
0
0
0
0
Bit 0/Receive FDL Bit 0 (RFDL0). LSB of the Received FDL Code.
Bit 1/Receive FDL Bit 1 (RFDL1).
Bit 2/Receive FDL Bit 2 (RFDL2).
Bit 3/Receive FDL Bit 3 (RFDL3).
Bit 4/Receive FDL Bit 4 (RFDL4).
Bit 5/Receive FDL Bit 5 (RFDL5).
Bit 6/Receive FDL Bit 6 (RFDL6).
Bit 7/Receive FDL Bit 7 (RFDL7). MSB of the Received FDL Code.
The receive FDL register (RFDL) reports the incoming facility data link (FDL) or the incoming Fs bits. The LSB is received
first.
Register Name:
RFDLM1, RFDLM2
Register Description:
Receive FDL Match Register 1
Receive FDL Match Register 2
Register Address:
C2h, C3h
Bit #
7
6
5
4
3
2
1
0
Name
RFDLM7
RFDLM6
RFDLM5
RFDLM4
RFDLM3
RFDLM2
RFDLM1
RFDLM0
Default
0
0
0
0
0
0
0
0
Bit 0/Receive FDL Match Bit 0 (RFDLM0). LSB of the FDL Match Code.
Bit 1/Receive FDL Match Bit 1 (RFDLM1).
Bit 2/Receive FDL Match Bit 2 (RFDLM2).
Bit 3/Receive FDL Match Bit 3 (RFDLM3).
Bit 4/Receive FDL Match Bit 4 (RFDLM4).
Bit 5/Receive FDL Match Bit 5 (RFDLM5).
Bit 6/Receive FDL Match Bit 6 (RFDLM6).
Bit 7/Receive FDL Match Bit 7 (RFDLM7). MSB of the FDL Match Code.