HP B1000 - Manual (Page 82)

82 Chapter 3
Troubleshooting
Selftest Failures
FLT CBF2 SYS BD bad OS HPMC len The size of the operating system HPMC
handler is invalid. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBF3 SYS BD bad OS HPMC addr The operating system HPMC handler
vector is invalid. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBF4 SYS BD bad OS HPMC cksm The operating system HPMC handler
failed the checksum test. Firmware will
halt the CPU, requiring a power cycle to
recover.
FLT CBF5 SYS BD OS HPMC vector 0 The size of the operating system HPMC
handler is zero. Firmware will halt the
CPU, requiring a power cycle to recover.
WRN CBFA SYS BD prev HPMC logged Firmware detected unread PIM data from
a previous HPMC and will overwrite it.
FLT CBFB SYS BD brnch to OS HPMC Branching to the operating system HPMC
handler.
FLT CBFC SYS BD OS HPMC br err Branch to the operating system HPMC
handler failed. Firmware will halt the
CPU, requiring a power cycle to recover.
FLT CBFD SYS BD unknown check The firmware trap handler didn’t detect
an HPMC, LPMC, or TOC.
FLT CBFE SYS BD HPMC during TOC A High-Priority Machine Check occurred
during Transfer of Control processing.
FLT CBFF SYS BD multiple HPMCs A High-Priority Machine Check occurred
while processing another HPMC.
INI CC0n SYS BD CPUn OS rendezvs Slave CPU n entering the final
rendezvous, waiting for the operating
system to awaken it.
INI CC1n SYS BD CPU n early rend Slave CPU n entering the early
rendezvous, waiting for the monarch CPU
to initialize scratch RAM and other
system state.
INI CC2n SYS BD CPU n rendezvous Slave CPU n entering rendezvous. Slave
CPUs enter this rendezvous numerous
times during boot.
INI CC3n SYS BD CPU n cache rend Slave CPU n entering cached rendezvous,
waiting for the monarch CPU to configure
the system bus.
Table 3-2. Chassis Codes for B1000/C3000 Workstations
Ostat Code FRU Message Description