BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e - Manual (Page 42)

IP Core Usage
III-30 Slave Controller – IP Core for Xilinx FPGAs
11. The tab "Ports" in the "System Assembly View" shows the connection signals. Connect the
EtherCAT IP Core to other IP and external FPGA pins.
Figure 11: EDK – System Assembly View, Ports tab