BECKHOFF EtherCAT IP Core for Xilinx FPGAs v2.04e - Manual (Page 26)

Features and Registers
III-14 Slave Controller – IP Core for Xilinx FPGAs
Feature
IP Core
Xilinx ®
V2.04e
IP Core
Xilinx
V2.04d
Example designs/
pre-synthesized time-limited
evaluation core included
2/1 4/2
FB1130 Digital I/O - x/x
FB1130 SPI - x/-
FB1130 PLB ® - x/-
FB1130 OPB ® - -
FB1130 PLB2OPB - -
Feature
IP Core
Xilinx ®
V2.04e
IP Core
Xilinx
V2.04d
LX150T PLB2AXI ® x/x x/x
LX150T Digital I/O x/- -
LX150T AXI - -
ZC702 AXI - -
Table 8: Legend
Symbol Description
x available
- not available
c configurable
User logic Functionality can be added by user logic inside the FPGA
red Feature changed in this version