Artesyn iVPX7225 Installation and Use (April 2015) - Manual (Page 66)

Controls, LEDs and Connectors
iVPX7225 Installation and Use (6806800S11C) 47
7 ETH_TDO P2XMC 12D 4 P P2XMC 12D 4 N PLD_TDO P2XMC 12D 3 P P2XMC 12D 3 N
8 ETH_TMS GND GND PLD_TMS GND GND
9 ETH_TCK P2XMC 12D 6 P P2XMC 12D 6 N PLD_TCK P2XMC 12D 5 P P2XMC 12D 5 N
10 ETH_TRST_L GND GND CPU_TDI GND GND
11 SPI_MOSI NC (X8D OPT) NC (X8D OPT) CPI_TDO SATA_XMC_TX- SATA_XMC_TX+
12 SPI_MISO GND GND CPU_TMS GND GND
13 SPI0_CS_L NC (X8D OPT) NC (X8D OPT) CPU_TCK NC (X8D OPT) NC (X8D OPT)
14 SPI1_CS_L GND GND CPU_TRST_L GND GND
15 SPI_CLK P2XMC 12D 8 P P2XMC 12D 8 N PCH_TDI P2XMC 12D 7 P P2XMC 12D 7 N
16 SPI_HDR_HOL
D0_L GND GND PCH_TDO GND GND
17 SPI_HDR_HOL
D1_L P2XMC 12D 10 P P2XMC 12D 10
N
PCH_TMS P2XMC 12D 9 P P2XMC 12D 9 N
18 SPI_HDR_PWR GND GND PCH_TCK GND GND
19 CORE_PGOOD P2XMC 12D 12 P P2XMC 12D 12
N
+VTT P2XMC 12D 11
P P2XMC 12D 11 N
Rows F and C of XJ16 are intended for use with a factory test XMC. These signals may conflict
with certain XMC's Rear/User IO signals.
A special iVPX7225 factory build option routes 8 additional XMC Differential I/O signals to
P2 in lieu of Mini-DP and SATA P2. Refer to the VITA 46.9 X8d Pattern.
Table 3-8 XJ16 Connector Pinout (continued)
Pin
Row F Row E Row D Row C Row B Row A