Artesyn iVPX7225 Installation and Use (April 2015) - Manual (Page 124)

FPGA Registers
iVPX7225 Installation and Use (6806800S11C) 105
7.1.9 Watchdog Re-trigger Register - 0x0A
7.1.10 Memory Write Protect Register - 0x0B
5 Watchdog Load Timer 0 WO -
0: Don't load watchdog timer.
1: Load watchdog timer.
6 Watchdog NMI Status 0 R/W1TC -
0: NMI not asserted.
1: NMI asserted.
7 Reserved 0 RO -
Table 7-8 Watchdog Control Register - 0x09 (continued)
Bit # Description Default LPC Access I2C Access
Table 7-9 Watchdog Re-trigger Register - 0x0A
Bit # Description Default LPC Access I2C Access
7:0 Watchdog Re-trigger 0x00 WO -
Writing data 0xAD re-triggers watchdog
Table 7-10 Memory Write Protect Register - 0x0B
Bit # Description Default LPC Access I2C Access
0 Ethernet Controller SPI ROM 0 R/W RO
0: Device write is allowed unless protected by
NVMRO.
1: Device is write protected unless protection
is overridden by RTM switch.