19 boot control and status 2 register - 0x17, Table 7-19, Boot control and status 2 register - 0x17 – Artesyn iVPX7225 Installation and Use (April 2015) User Manual
Page 133: Fpga registers
FPGA Registers
iVPX7225 Installation and Use (6806800S11C)
114
7.1.19 Boot Control and Status 2 Register - 0x17
When IPMI is disabled via on-board DIP switch and Boot Flash Programming Enable (bit 0) in
Boot Control and Status Register 2 is enabled, Software Boot Flash Select (bits 6 and 7) can
be used to select a FLASH bank for the purpose of programming the bank. When IPMI is
disabled via on-board DIP switch, reset of the board will force boot from the selected bank
unless it is a power on reset.
Table 7-19 Boot Control and Status 2 Register - 0x17
Bit #
Description
Default
LPC Access
I2C Access
0
Boot Flash Programming Enable
0
R/W
RO
0: Disable boot flash programming.
1: Enable selected boot flash
programming.
Note: When enabled, Current Flash
Selection (bit 1) indicates the
current bank selection.That means
the bank that will be programmed.
When IPMI is disabled via on-board
DIP switch, the boot FLASH bank
selected in bit 6 or 7 of Boot Control
and Status Register 1 (0x16) is
selected for programming.
Otherwise, the current boot bank
selected by IPMI is selected.
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