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1 received buffer register (rbr), 2 transmitter holding register (thr), Table 7-44 – Artesyn iVPX7225 Installation and Use (April 2015) User Manual

Page 148: Receiver buffer register (rbr) if dlab=0, Table 7-45, Transmitter holding register (thr) if dlab=0, Fpga registers

1 received buffer register (rbr), 2 transmitter holding register (thr), Table 7-44 | Receiver buffer register (rbr) if dlab=0, Table 7-45, Transmitter holding register (thr) if dlab=0, Fpga registers | Artesyn iVPX7225 Installation and Use (April 2015) User Manual | Page 148 / 168 1 received buffer register (rbr), 2 transmitter holding register (thr), Table 7-44 | Receiver buffer register (rbr) if dlab=0, Table 7-45, Transmitter holding register (thr) if dlab=0, Fpga registers | Artesyn iVPX7225 Installation and Use (April 2015) User Manual | Page 148 / 168
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