Kontron S4600 SEL Troubleshooting - Manual (Page 89)

System Event Log Troubleshooting Guide for EPSD Platforms Based on Intel ® Xeon ® Processor E5 4600/2600/2400/1600/1400 Product Families
Memory Subsystem
Revision 1.1 Intel order number G90620-002 79
Byte Field Description
1b = DIMM Slot ID in Event Data 3 Bits[2:0] is valid
[2:0] – Error Type:
000b = Parity Error Type not known
001b = Data Parity Error (not used)
010b = Address Parity Error
All other values are reserved.
16 Event Data 3 [7:5] – Indicates the Processor Socket to which the DDR3 DIMM having the ECC error is attached:
0-3 = CPU1-4
All other values are reserved.
[4:3] – Channel Number (if valid) on which the Parity Error occurred. This value will be indeterminate and should be ignored if ED2
Bit [4] is 0b.
00b = Channel A
01b = Channel B
10b = Channel C
11b = Channel D
[2:0] – DIMM Slot ID (if valid) of the specific DIMM that was involved in the transaction that led to the parity error. This value will
be indeterminate and should be ignored if ED2 Bit [3] is 0b.
000b = DIMM Socket 1
001b = DIMM Socket 2
010b = DIMM Socket 3
All other values are reserved.
7.5.2.1 Memory Address Parity Error Sensor – Next Steps
These are bit errors that are detected in the memory addressing hardware. An Address Parity Error implies that the memory address
transmitted to the DIMM addressing circuitry has been compromised, and data read or written is compromised in turn. An Address
Parity Error is logged as such in SEL but in all other ways is treated the same as an Uncorrectable ECC Error.
While the error may be due to a failing DRAM chip on the DIMM, it can also be cause by incorrect seating or improper contact
between the socket and DIMM, or by the bent pins in the processor socket.
1. If needed, decode DIMM location from hex version of SEL.
2. Verify the DIMM is seated properly.
3. Examine gold fingers on edge of the DIMM to verify contacts are clean.