Rainbow Electronics DS26504 - Manual (Page 91)

DS26504 T1/E1/J1/64KCC BITS Element
91 of 128
Register Name:
IMR1
Register Description: Interrupt Mask Register 1
Register Address: 15h
Bit
# 7 6 5 4 3 2 1 0
Name — — — JALT — TCLE TOCD —
Default 0 0 0 0 0 0 0 0
HW
Mode
X X X X X X X X
Bits 0, 3, 5, 6, 7: Unused, must be set = 0 for proper operation.
Bit 1: Transmit Open-Circuit-Detect Condition (TOCD)
0 = interrupt masked
1 = interrupt enabled–generates interrupts on rising and falling edges
Bit 2: Transmit Current-Limit-Exceeded Condition (TCLE)
0 = interrupt masked
1 = interrupt enabled–generates interrupts on rising and falling edges
Bit 4: Jitter Attenuator Limit Trip Event (JALT)
0 = interrupt masked
1 = interrupt enabled