Rainbow Electronics DS26504 - Manual (Page 59)

DS26504 T1/E1/J1/64KCC BITS Element
59 of 128
Register Name: SR3
Register Description: Status Register 3
Register Address: 18h
Bit
# 7 6 5 4 3 2 1 0
Name — LOTC BOCC RFDLAD RFDLF TFDLE RMTCH RBOC
Default 0 0 0 0 0 0 0 0
HW
Mode
X X X X X X X X
Bit 0: Receive BOC Detector Change-of-State Event (RBOC). Set whenever the BOC detector sees a change of state to a
valid BOC. The setting of this bit prompts the user to read the RFDL register.
Bit 1: Receive FDL Match Event (RMTCH). Set whenever the contents of the RFDL register matches RFDLM1 or
RFDLM2.
Bit 2: TFDL Register Empty Event (TFDLE). Set when the transmit FDL buffer (TFDL) empties.
Bit 3: RFDL Register Full Event (RFDLF). Set when the receive FDL buffer (RFDL) fills to capacity.
Bit 4: RFDL Abort Detect Event (RFDLAD). Set when eight consecutive ones are received on the FDL.
Bit 5: BOC Clear Event (BOCC). Set when 30 FDL bits occur without an abort sequence.
Bit 6: Loss-of-Transmit Clock Event (LOTC). Set when the signal at the TCLK pin has not transitioned for approximately
15 periods of the scaled MCLK.
Bit 7: Unused