ST & T UPSD3212C - Manual (Page 95)

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uPSD3212A, uPSD3212C, uPSD3212CV
Table 82. Instructions
Note: 1. All bus cycles are WRITE bus cycles, except the ones with the “Read” label
2. All values are in hexadecimal:
3. X = Don’t care. Addresses of the form XXXXh, in this table, must be even addresses
4. RA = Address of the memory location to be read
5. RD = Data READ from location RA during the READ cycle
6. PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of WRITE Strobe (WR, CNTL0).
7. PA is an even address for PSD in Word Programming Mode.
8. PD = Data word to be programmed at location PA. Data is latched on the rising edge of WRITE Strobe (WR, CNTL0)
9. SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS3 or CSBOOT0-CSBOOT1) of the sector to be
erased, or verified, must be Active (High).
10. Sector Select (FS0-FS3 or CSBOOT0-CSBOOT1) signals are active High, and are defined in PSDsoft Express.
11. Only address Bits A11-A0 are used in instruction decoding.
12. No Unlock or instruction cycles are required when the device is in the READ Mode
13. The RESET Instruction is required to return to the READ Mode after reading the Sector Protection Status, or if the Error Flag Bit
(DQ5) goes High.
14. Additional sectors to be erased must be written at the end of the Sector Erase instruction within 80µs.
15. The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active, and
(A1,A0)=(1,0)
16. The system may perform READ and Program cycles in non-erasing sectors, read the Sector Protection Status when in the Suspend
Sector Erase Mode. The Suspend Sector Erase instruction is valid only during a Sector Erase cycle.
17. The Resume Sector Erase instruction is valid only during the Suspend Sector Erase Mode.
18. The MCU cannot invoke these instructions while executing code from the same Flash memory as that for which the instruction is
intended. The MCU must retrieve, for example, the code from the secondary Flash memory when reading the Sector Protection
Status of the primary Flash memory.
Instruction
FS0-FS3 or
CSBOOT0-
CSBOOT1
Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7
READ (5) 1
“Read”
RD @ RA
READ Sector
Protection
(6,8,11)
1
AAh@
X555h 55h@
XAAAh 90h@
X555h Read status @
XX02h
Program a Flash
Byte
(11)
1
AAh@
X555h 55h@
XAAAh A0h@
X555h
PD@ PA
Flash Sector
Erase
(7,11)
1
AAh@
X555h 55h@
XAAAh 80h@
X555h
AAh@ X555h
55h@
XAAAh 30h@
SA 30h
(7)
@
next SA
Flash Bulk
Erase
(11)
1
AAh@
X555h 55h@
XAAAh 80h@
X555h
AAh@ X555h
55h@
XAAAh 10h@
X555h
Suspend Sector
Erase
(9)
1
B0h@
XXXXh
Resume Sector
Erase
(10)
1
30h@
XXXXh
RESET (6) 1
F0h@
XXXXh