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Data transfers – ST & T UPSD3212C User Manual

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uPSD3212A, uPSD3212C, uPSD3212CV

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Data Transfers
Internal RAM.
Table

6

shows the menu of in-

structions that are available for moving data
around within the internal memory spaces, and the
addressing modes that can be used with each
one. The MOV , instruction allows
data to be transferred between any two internal
RAM or SFR locations without going through the
Accumulator. Remember, the Upper 128 bytes of
data RAM can be accessed only by indirect ad-
dressing, and SFR space only by direct address-
ing.
Note: In uPSD321x Devices, the stack resides in
on-chip RAM, and grows upwards. The PUSH in-
struction first increments the Stack Pointer (SP),
then copies the byte into the stack. PUSH and
POP use only direct addressing to identify the byte
being saved or restored, but the stack itself is ac-
cessed by indirect addressing using the SP regis-
ter. This means the stack can go into the Upper
128 bytes of RAM, if they are implemented, but not
into SFR space.
The Data Transfer instructions include a 16-bit
MOV that can be used to initialize the Data Pointer
(DPTR) for look-up tables in Program Memory.

The XCH A, instruction causes the Accu-
mulator and ad-dressed byte to exchange data.
The XCHD A, @Ri instruction is similar, but only
the low nibbles are involved in the exchange. To
see how XCH and XCHD can be used to facilitate
data manipulations, consider first the problem of
shifting and 8-digit BCD number two digits to the
right.

Table 8., page 21

shows how this can be

done using XCH instructions. To aid in under-
standing how the code works, the contents of the
registers that are holding the BCD number and the
content of the Accumulator are shown alongside
each instruction to indicate their status after the in-
struction has been executed.
After the routine has been executed, the Accumu-
lator contains the two digits that were shifted out
on the right. Doing the routine with direct MOVs
uses 14 code bytes. The same operation with
XCHs uses only 9 bytes and executes almost
twice as fast. To right-shift by an odd number of
digits, a one-digit must be executed.

Table

9., page 21

shows a sample of code that will right-

shift a BCD number one digit, using the XCHD in-
struction. Again, the contents of the registers hold-
ing the number and of the accumulator are shown
alongside each instruction.

Table 6. Data Transfer Instructions that Access Internal Data Memory Space

Mnemonic

Operation

Addressing Modes

Dir.

Ind.

Reg.

Imm

MOV A,

A =

X

X

X

X

MOV ,A

= A

X

X

X

MOV ,

=

X

X

X

X

MOV DPTR,#data16

DPTR = 16-bit immediate constant

X

PUSH

INC SP; MOV “@SP”,

X

POP

MOV ,”@SP”; DEC SP

X

XCH A,

Exchange contents of A and

X

X

X

XCHD A,@Ri

Exchange low nibbles of A and @Ri

X

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