ST & T UPSD3212C - Manual (Page 26)

uPSD3212A, uPSD3212C, uPSD3212CV
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Figure 14. State Sequence in uPSD321x Devices
Osc.
(XTAL2)
Read opcode
Read next
opcode
Read next
opcode and
discard
Read next
opcode and
discard
Read 2nd
Byte
No Fetch No Fetch
No ALE
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
S1 S2 S3 S4 S5 S6
Read opcode
Read next
opcode
S1 S2 S3 S4 S5 S6
Read opcode
Read next
opcode
S1 S2 S3 S4 S5 S6
Read next
opcode and
discard
S1 S2 S3 S4 S5 S6
Read next
opcode and
discard
Read next
opcode and
discard
Read opcode
(MOVX) Read next
opcode
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
Addr Data
Access External Memory
AI06822
p1 p1 p1 p1 p1 p1 p1 p1 p1 p1 p1 p1 p2 p2 p2 p2 p2 p2 p2 p2 p2 p2 p2 p2
a. 1-Byte, 1-Cycle Instruction, e.g. INC A
b. 2-Byte, 1-Cycle Instruction, e.g. ADD A, adrs
c. 1-Byte, 2-Cycle Instruction, e.g. INC DPTR
d. 1-Byte, 2-Cycle MOVX Instruction