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Timer/counters (timer 0, timer 1 and timer 2), Timer 0 and timer 1, Table 36. control register (tcon) – ST & T UPSD3212C User Manual

Page 48: Table 37. description of the tcon bits, Table 38. tmod register (tmod)

Timer/counters (timer 0, timer 1 and timer 2), Timer 0 and timer 1, Table 36. control register (tcon) | Table 37. description of the tcon bits, Table 38. tmod register (tmod) | ST & T UPSD3212C User Manual | Page 48 / 163 Timer/counters (timer 0, timer 1 and timer 2), Timer 0 and timer 1, Table 36. control register (tcon) | Table 37. description of the tcon bits, Table 38. tmod register (tmod) | ST & T UPSD3212C User Manual | Page 48 / 163
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