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Figure 7. packet buffering fifo, Figure 8. ethernet frame format, Packet buffering fifo – Intel IXF1104 User Manual

Page 71: Ethernet frame format, Figure 8 “ethernet frame format, Figure 7

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Intel

®

IXF1104 4-Port Gigabit Ethernet Media Access Controller

71

Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005

5.1.2.1.1

Pause Frame Format

PAUSE frames are MAC control frames that are padded to the minimum size (64 bytes).

Figure 8

and

Figure 9

illustrate the frame format and contents.

Figure 7. Packet Buffering FIFO

MDI

High Watermark

Data Flow

MAC Transfer Threshold

Low Watermark

High Watermark

Data Flow

Low Watermark

RX FIFO High

TXPAUSEFR (External

Strobe)

802.3x Pause Frame Generation

TX FIFO

TX Side

MAC

RX FIFO

802.3 Flow

Control

RX Side

MAC

SPI3 Interface

B3231-01

Figure 8. Ethernet Frame Format

B2277-02

DA

SA

Data

FCS

Type/

Length

S

F

D

Preamble

7

1

4

6

6

2

46-1500

Ethernet Frame

Number of bytes

Note:

64 Byte Minimum / 1518 bytes Maximum

See also other documents in the category Intel Hardware: