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0 general description, Figure 1. block diagram, General description – Intel IXF1104 User Manual

Page 21: Block diagram

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Intel

®

IXF1104 4-Port Gigabit Ethernet Media Access Controller

21

Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005

2.0

General Description

The IXF1104 MAC provides up to a 4.0 Gbps interface to four individual 10/100/1000 Mbps full-
duplex or 10/100 Mbps half-duplex-capable Ethernet Media Access Controllers (MACs). The
network processor is supported through a System Packet Interface Phase 3 (SPI3) media interface.
The following PHY interfaces are selected on a per-port basis:

Serializer/Deserializer (SerDes) with Optical Module Interface support

Gigabit Media Independent Interface (GMII)

Reduced Gigabit Media Independent Interface (RGMII).

Figure 1

illustrates the IXF1104 MAC block diagram.

Figure 1. Block Diagram

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Intel

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IXF1104 MAC

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PHY 1 Device

PHY 2 Device

PHY 3 Device

PHY 4 Device

B3175-01