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Vector table configuration – FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E User Manual

Page 59

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35

CHAPTER 4 RESET AND "EIT" PROCESSING

Vector Table Configuration

Vector tables are located in the main memory, occupying an area of 1 Kbyte beginning with the address

shown in the TBR. These areas are intended for use as a table of entry addresses for "EIT" processing,

however in applications where vector tables are not required, this area can be used as a normal instruction

or data area.

Figure 4.2-2 shows the structure of the vector table. (Example of 32-source)

Figure 4.2-2 Vector Table Configuration

TBR

00000000

H

FFFFFFFF

H

1 K

b

yte

Memory

s

p

a

ce

Off

s

et Vector no.

De

s

cription

000

H

004

H

00

8

H

33

C

H

3

40

H

3

44

H

3

BC

H

3

C0

H

3

C4

H

3

C

8

H

3

CC

H

3

D0

H

3

F

8

H

3

FC

H

FF

H

FE

H

FD

H

3

0

H

2F

H

2E

H

10

H

0F

H

0E

H

0D

H

0C

H

0B

H

01

H

00

H

INT #0FF

H

INT #0FE

H

INT #0FD

H

INT #0

3

0

H

INT #02F

H

or IR

3

1

INT #02E

H

or IR

3

0

INT #010

H

or IR00

INT #00F

H

or NMI

Undefined in

s

tr

u

ction exception

Em

u

l

a

tor exception

S

tep tr

a

ce tr

a

p

Oper

a

nd

b

re

a

k tr

a

p

S

y

s

tem re

s

erved or Mode Vector

Re

s

et