FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E User Manual

Page 107

CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS

7.12

CMP (Compare Immediate Data of Source Register and
Destination Register)

Subtracts the result of the higher 28 bits of 4-bit immediate data with zero extension
from the word data in "Ri", places results in the condition code register (CCR).

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CMP (Compare Immediate Data of Source Register and Destination Register)

Assembler format:

CMP #i4, Ri

Operation:

Ri – extu(i4)

Flag change:

N :

Set when the MSB of the operation result is "1", cleared when the MSB is "0".

Z :

Set when the operation result is "0", cleared otherwise.

V :

Set when an overflow has occurred as a result of the operation, cleared otherwise.

C :

Set when a carry has occurred as a result of the operation, cleared otherwise.

Execution cycles:

1 cycle

Instruction format:

Example:

CMP #3, R3

MSB

LSB

0 0 0 0

0 0 0 3

N Z V C

CCR

0 0 0 0

N Z V C

0 1 0 0

0 0 0 0

0 0 0 3

Instruction bit pattern :

1010 1000 0011 0011

Before execution

After execution