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FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E User Manual

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7.35

MULU (Multiply Unsigned Word Data) ............................................................................................ 122

7.36

MULH (Multiply Half-word Data) ..................................................................................................... 124

7.37

MULUH (Multiply Unsigned Half-word Data) .................................................................................. 126

7.38

DIV0S (Initial Setting Up for Signed Division) ................................................................................. 128

7.39

DIV0U (Initial Setting Up for Unsigned Division) ............................................................................. 130

7.40

DIV1 (Main Process of Division) ..................................................................................................... 132

7.41

DIV2 (Correction when Remainder is 0) ......................................................................................... 134

7.42

DIV3 (Correction when Remainder is 0) ......................................................................................... 136

7.43

DIV4S (Correction Answer for Signed Division) ............................................................................. 137

7.44

LSL (Logical Shift to the Left Direction) .......................................................................................... 138

7.45

LSL (Logical Shift to the Left Direction) .......................................................................................... 139

7.46

LSL2 (Logical Shift to the Left Direction) ........................................................................................ 140

7.47

LSR (Logical Shift to the Right Direction) ....................................................................................... 141

7.48

LSR (Logical Shift to the Right Direction) ....................................................................................... 142

7.49

LSR2 (Logical Shift to the Right Direction) ..................................................................................... 143

7.50

ASR (Arithmetic Shift to the Right Direction) .................................................................................. 144

7.51

ASR (Arithmetic Shift to the Right Direction) .................................................................................. 145

7.52

ASR2 (Arithmetic Shift to the Right Direction) ................................................................................ 146

7.53

LDI:32 (Load Immediate 32-bit Data to Destination Register) ........................................................ 147

7.54

LDI:20 (Load Immediate 20-bit Data to Destination Register) ........................................................ 148

7.55

LDI:8 (Load Immediate 8-bit Data to Destination Register) ............................................................ 149

7.56

LD (Load Word Data in Memory to Register) ................................................................................. 150

7.57

LD (Load Word Data in Memory to Register) ................................................................................. 151

7.58

LD (Load Word Data in Memory to Register) ................................................................................. 152

7.59

LD (Load Word Data in Memory to Register) ................................................................................. 153

7.60

LD (Load Word Data in Memory to Register) ................................................................................. 154

7.61

LD (Load Word Data in Memory to Register) ................................................................................. 155

7.62

LD (Load Word Data in Memory to Program Status Register) ....................................................... 157

7.63

LDUH (Load Half-word Data in Memory to Register) ..................................................................... 159

7.64

LDUH (Load Half-word Data in Memory to Register) ..................................................................... 160

7.65

LDUH (Load Half-word Data in Memory to Register) ..................................................................... 161

7.66

LDUB (Load Byte Data in Memory to Register) .............................................................................. 162

7.67

LDUB (Load Byte Data in Memory to Register) .............................................................................. 163

7.68

LDUB (Load Byte Data in Memory to Register) .............................................................................. 164

7.69

ST (Store Word Data in Register to Memory) ................................................................................. 165

7.70

ST (Store Word Data in Register to Memory) ................................................................................. 166

7.71

ST (Store Word Data in Register to Memory) ................................................................................. 167

7.72

ST (Store Word Data in Register to Memory) ................................................................................. 168

7.73

ST (Store Word Data in Register to Memory) ................................................................................. 169

7.74

ST (Store Word Data in Register to Memory) ................................................................................. 170

7.75

ST (Store Word Data in Program Status Register to Memory) ....................................................... 171

7.76

STH (Store Half-word Data in Register to Memory) ....................................................................... 172

7.77

STH (Store Half-word Data in Register to Memory) ....................................................................... 173

7.78

STH (Store Half-word Data in Register to Memory) ....................................................................... 174

7.79

STB (Store Byte Data in Register to Memory) ................................................................................ 175

7.80

STB (Store Byte Data in Register to Memory) ................................................................................ 176

7.81

STB (Store Byte Data in Register to Memory) ................................................................................ 177