FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 106)

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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.11 CMP (Compare Word Data in Source Register and
Destination Register)
Subtracts the word data in "Rj" from the word data in "Ri", places results in the
condition code register (CCR).
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CMP (Compare Word Data in Source Register and Destination Register)
Assembler format: CMP Rj, Ri
Operation: Ri – Rj
Flag change:
N : Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z : Set when the operation result is "0", cleared otherwise.
V : Set when an overflow has occurred as a result of the operation, cleared otherwise.
C : Set when a borrow has occurred as a result of the operation, cleared otherwise.
Execution cycles: 1 cycle
Instruction format:
Example: CMP R2, R3
N Z V C
C C C C
MSB LSB
1 0 1 0 1 0 1 0 Rj Ri
R2
R3
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
N Z V C
CCR
R2
R3
CCR 0 0 0 0
N Z V C
0 1 0 0
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Before execution After execution
Instruction bit pattern : 1010 1010 0010 0011