FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 126)

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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.24 EORH (Exclusive Or Half-word Data of Source Register to
Data in Memory)
Takes the logical exclusive OR of the half-word data at memory address "Ri" and the
half-word data in "Rj", stores the results to the memory address corresponding to "Ri".
The CPU will not accept hold requests between the memory read operation and the
memory write operation of this request.
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EORH (Exclusive Or Half-word Data of Source Register to Data in Memory)
Assembler format: EORH Rj, @Ri
Operation: (Ri) eor Rj
→
(Ri)
Flag change:
N: Set when the MSB (bit 15) of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V and C: Unchanged
Execution cycles: 1 + 2a cycles
Instruction format:
N Z V C
C C – –
MSB LSB
1 0 0 1 1 1 0 1 Rj Ri