3 table base register (tbr), Table base register (tbr) – FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E User Manual
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CHAPTER 3 REGISTER DESCRIPTIONS
3.3.3
Table Base Register (TBR)
The Table Base Register (TBR) designates the table containing the entry address for
"EIT" operations.
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Overview of the Table Base Register
The Table Base Register (TBR) designates the table containing the entry address for "EIT" operations.
When an "EIT" condition occurs, the address of the vector reference is determined by the sum of the
contents of this register and the vector offset corresponding to the "EIT" operation.
Figure 3.3-7 shows an example of the operation of the table base register.
Figure 3.3-7 Sample of Table Base Register (TBR) Operation
Vector corre
s
pondence t
ab
le
Vector no.
Vector off
s
et
Timer
interr
u
pt
11
H
3
B
8
H
b
it
3
1
0
EAddr0 EAddr1 EAddr2 EAddr
3
EAddr0 EAddr1 EAddr2 EAddr
3
PC
TBR
8
765412
3
H
Adder
Vector t
ab
le
+0
+1
+2
+
3
8
765412
3
H
+00000
3
B
8
H
8
76544DB
H
8
76544D
8
H
The process of referencing a vector table involves application of address alignment rules
for word access.
Note: