FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 311)

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INDEX
EORB (Exclusive Or Byte Data of Source Register to
Data in Memory) ................................. 104
EORH (Exclusive Or Half-word Data of Source
Register to Data in Memory) ................ 102
MOV (Move Word Data in Source Register to
Destination Register) ........... 178, 179, 181
MOV (Move Word Data in Source Register to
Program Status Register) ..................... 182
OR (Or Word Data of Source Register to Data in
Memory) .............................................. 93
OR (Or Word Data of Source Register to Destination
Register) .............................................. 92
ORB (Or Byte Data of Source Register to Data in
Memory) .............................................. 97
ORH (Or Half-word Data of Source Register to Data
in Memory) .......................................... 95
SUB (Subtract Word Data in Source Register from
Destination Register) ............................. 79
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register) ....... 80
SUBN (Subtract Word Data in Source Register from
Destination Register) ............................. 81
SSP
System Stack Pointer (SSP),User Stack Pointer (USP)
............................................................ 27
ST
ST (Store Word Data in Program Status Register to
Memory) ............................................ 171
ST (Store Word Data in Register to Memory)
.................. 165, 166, 167, 168, 169, 170
Stack Pointer
Functions of the System Stack Pointer and User Stack
Pointer ................................................. 28
Relation between "R15" and Stack Pointer ........... 16
Stack Pointer Configuration ................................ 28
System Stack Pointer (SSP),User Stack Pointer (USP)
............................................................ 27
STB
STB (Store Byte Data in Register to Memory)
.......................................... 175, 176, 177
Step Trace
"PC" Values Saved for Step Trace Traps .............. 47
Conditions for Generation of Step Trace Traps ..... 47
Overview of Step Trace Traps ............................. 47
Precautionary Information for Use of Step Trace Traps
............................................................ 47
Relation of Step Trace Traps to "NMI" and External
Interrupts .............................................. 47
Step Trace Trap Operation .................................. 47
Stepwise Division Programs
Interrupts during Execution of Stepwise Division
Programs .............................................. 37
STH
STH (Store Half-word Data in Register to Memory)
.......................................... 172, 173, 174
STILM
STILM (Set Immediate Data to Interrupt Level Mask
Register) .............................................240
STM
STM0 (Store Multiple Registers) .......................250
STM1 (Store Multiple Registers) .......................252
Store
COPST (Store 32-bit Data from Coprocessor Register
to Register) .........................................233
Store Byte Data
STB (Store Byte Data in Register to Memory)
..........................................175, 176, 177
Store Half-word Data
STH (Store Half-word Data in Register to Memory)
..........................................172, 173, 174
Store Multiple Registers
STM0 (Store Multiple Registers) .......................250
STM1 (Store Multiple Registers) .......................252
Store Word Data
ST (Store Word Data in Program Status Register to
Memory) .............................................171
ST (Store Word Data in Register to Memory)
..................165, 166, 167, 168, 169, 170
STRES (Store Word Data in Resource to Memory)
..........................................................228
STRES
STRES (Store Word Data in Resource to Memory)
..........................................................228
SUB
SUB (Subtract Word Data in Source Register from
Destination Register) ..............................79
SUBC
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register) .......80
SUBN
SUBN (Subtract Word Data in Source Register from
Destination Register) ..............................81
Subroutine
CALL (Call Subroutine) ............................185, 186
CALL:D (Call Subroutine) ........................197, 199
RET (Return from Subroutine) ...........................187
RET:D (Return from Subroutine) .......................201
Subtract Word Data
SUB (Subtract Word Data in Source Register from
Destination Register) ..............................79
SUBC (Subtract Word Data in Source Register and
Carry Bit from Destination Register) .......80
SUBN (Subtract Word Data in Source Register from
Destination Register) ..............................81
System Condition Code Register
System Condition Code Register (SCR: Bit 10 to
bit 08) ...................................................20