FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 105)

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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.10 SUBN (Subtract Word Data in Source Register from
Destination Register)
Subtracts the word data in "Rj" from the word data in "Ri", stores results to "Ri" without
changing the flag settings.
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SUBN (Subtract Word Data in Source Register from Destination Register)
Assembler format: SUBN Rj, Ri
Operation: Ri – Rj
→
Ri
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: 1 cycle
Instruction format:
Example: SUBN R2, R3
N Z V C
– – – –
MSB LSB
1 0 1 0 1 1 1 0 Rj Ri
R2
R3
1 2 3 4 5 6 7 8
9 9 9 9 9 9 9 9
N Z V C
CCR
R2
R3
CCR 0 0 0 0
N Z V C
0 0 0 0
8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8
Before execution After execution
Instruction bit pattern : 1010 1110 0010 0011