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FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E User Manual

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76

CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS

7.5

ADDN (Add Word Data of Source Register to Destination
Register)

Adds the word data in "Rj" and the word data in "Ri", stores results to "Ri" without
changing flag settings.

ADDN (Add Word Data of Source Register to Destination Register)

Assembler format:

ADDN Rj, Ri

Operation:

Ri + Rj

Ri

Flag change:

N, Z, V, and C: Unchanged

Execution cycles:

1 cycle

Instruction format:

Example:

ADDN R2, R3

N

Z

V

C

MSB

LSB

1

0

1

0

0

0

1

0

Rj

Ri

R2

R3

1 2 3 4

5 6 7 8

8 7 6 5

4 3 2 1

N Z V C

CCR

R2

R3

CCR

0 0 0 0

N Z V C

0 0 0 0

9 9 9 9

9 9 9 9

1 2 3 4

5 6 7 8

Before execution

After execution

Instruction bit pattern : 1010 0010 0010 0011