FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 274)

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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.131 STM0 (Store Multiple Registers)
The "STM0" instruction accepts registers in the range R0 to R7 as members of the
parameter "reglist" (See Table 7.131-1.) .
Registers are processed in descending numerical order.
■
STM0 (Store Multiple Registers)
Assembler format: STM0 (reglist)
Operation: The following operations are repeated according to the number of registers specified in the
parameter "reglist".
R15 – 4
→ R15
Ri
→ (R15)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles: If "n" is the number of registers specified in the parameter "reglist", the execution cycles
re
q uired are as follows.
a × n + 1 cycle
Instruction format:
N Z V C
– – – –
Table 7.131-1 Bit Values and Register Numbers for "reglist" (STM0)
Bit Register Bit Register
7 R0 3 R4
6 R1 2 R5
5 R2 1 R6
4 R3 0 R7
MSB LSB
1 0 0 0 1 1 1 0 reglist