Measurement Computing Data Acquisition Systems rev.10.4 User Manual
Page 342

D-2 9513 Counter-Timer
938295
Programmer’s Manual
Initialize the 9513 master mode register fout divider: 10, fout source: DcsF2 (100 kHz), compare1: no,
compare 2: no, time of day disabled. This will place a 10 kHz pulse on the oscillator output. The
daq9513SetMasterMode
function will initialize the counter/timer section and configure several of its
parameters. This is a system-wide function that affects all 5 counter timers.
Aside from initializing the counter/timer section, this application does not use most of the capabilities of
the
daq9513SetMasterMode
function. The first two arguments in this function select a clock source for
the fout signal found on connector P3, then select a divider for that signal. F2 in this application is a fixed,
internal frequency source of 100 kHz. Our example divides this fixed frequency by 10 yielding a signal on
fout of 10 kHz.
ret& = VBdaq9513SetMasterMode&(handle&, DiodtLocal9513&, 0, 10, DcsF2&, 0, 0,
DtodDisabled&)
The
daq9513SetCtrMode
function configures an individual counter in the 9513. The first argument
specifies the counter to be configured; the second argument specifies the internal operation of the gate
control. Our application does not use the gate, so it is disabled. The fixed 100 kHz internal clock (F1) is
used as the source. By setting the reload parameter to 1, the counter will use the ’load’ register and the
’hold’ register to generate the pulse train. When the counter is armed, the ’load’ register value is loaded
then decremented on every edge of the F1 clock. The output signal will be high during this phase. When
the terminal count is reached, the ’hold’ register is loaded then decremented on every edge of the F1 clock.
The output signal is low during this phase. If the reload argument is set to 0, only the ’load’ register is
used, always yielding a 50% duty-cycle pulse train. The
cntRepeat
argument specifies whether the pulse
train should execute once or repeat continuously. The counter interprets the load and load register as either
binary or BCD, depending on the value of the
cntType
argument. The
cntDir
specifies whether the
internal counter should count up or down to reach the terminal count. A value of 5 counted down has the
same effect as a value of 65,530 counted up.
ret& = VBdaq9513SetCtrMode&(handle&, DiodtLocal9513&, 0, 1, DgcNoGating&, 1,
DcsF1&, 0, 1, 1, 0, 0, DocTCToggled&)
Set the load register to 75 and the hold register to 25. This produces a high duty-cycle of 75% and (with
100 total counts to count down) a frequency of 10 kHz.
' Load the load register: 75 low counts & hold register with 25 counts
ret& = VBdaq9513SetLoad&(handle&, DiodtLocal9513, 0, 1, 75)
ret& = VBdaq9513SetHold&(handle&, DiodtLocal9513, 0, 1, 25)
The daq9513MultCtrl function will arm counter 1.
ret& = VBdaq9513MultCtrl&(handle&, DiodtLocal9513&, 0, DmccLoadArm&, 1, 0,
0, 0, 0)
Continue the pulse train until user terminates it.
Print "A 10Khz 25% duty cycle square wave is on the counter 1 output.":
MsgBox "Click to halt counter 1 output.", , "Counter 1"
' Halt all output
ret& = VBdaq9513MultCtrl&(handle&, DiodtLocal9513&, 0, DmccDisarm&, 1, 0,
0, 0, 0)
ret& = VBdaq9513SetMasterMode&(handle&, DiodtLocal9513&, 0, 0, DcsF2&, 0, 0,
DtodDisabled&)
Print "Outputs disabled."